gigl.src.common.models.layers.DirectAU =========================================== .. currentmodule:: gigl.src.common.models.layers.task .. autoclass:: DirectAU :members: :show-inheritance: :special-members: :inherited-members: .. rubric:: Methods .. autosummary:: :nosignatures: ~DirectAU.__init__ ~DirectAU.add_module ~DirectAU.apply ~DirectAU.bfloat16 ~DirectAU.buffers ~DirectAU.children ~DirectAU.compile ~DirectAU.cpu ~DirectAU.cuda ~DirectAU.double ~DirectAU.eval ~DirectAU.extra_repr ~DirectAU.float ~DirectAU.forward ~DirectAU.get_buffer ~DirectAU.get_extra_state ~DirectAU.get_parameter ~DirectAU.get_submodule ~DirectAU.half ~DirectAU.ipu ~DirectAU.load_state_dict ~DirectAU.modules ~DirectAU.mtia ~DirectAU.named_buffers ~DirectAU.named_children ~DirectAU.named_modules ~DirectAU.named_parameters ~DirectAU.parameters ~DirectAU.register_backward_hook ~DirectAU.register_buffer ~DirectAU.register_forward_hook ~DirectAU.register_forward_pre_hook ~DirectAU.register_full_backward_hook ~DirectAU.register_full_backward_pre_hook ~DirectAU.register_load_state_dict_post_hook ~DirectAU.register_load_state_dict_pre_hook ~DirectAU.register_module ~DirectAU.register_parameter ~DirectAU.register_state_dict_post_hook ~DirectAU.register_state_dict_pre_hook ~DirectAU.requires_grad_ ~DirectAU.set_extra_state ~DirectAU.set_submodule ~DirectAU.share_memory ~DirectAU.state_dict ~DirectAU.to ~DirectAU.to_empty ~DirectAU.train ~DirectAU.type ~DirectAU.xpu ~DirectAU.zero_grad